Category Archives: Verilog
Verilog Examples For The Spartan 3 / Nexys 2 Boards
Well, I thought I’d be extra generous since I haven’t posted in so long, and have uploaded 4 verilog examples for your viewing pleasure. I have been a bit busy to comment them but I hope that they may be … Continue reading
Digital Design with Pipeline 6 Bit Registers
This SLSL / ‘sudo verilog’ program implements the digital design of a pipeline having multiple registers, an adder, and multiplication architecture. The program can easily be re-implemented in Verilog at your discretion. SLSL is a wonderful language that allows for … Continue reading
Posted in Verilog, comp-e, forum
Tagged CE, coding, computer engineering, forum, FPGA, Verilog
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Nexys 2 Spartan 3 FPGA Arrives
It took a week to get it from Washington state, but it’s finally here. My gorgeous Nexys 2 board I ordered from Digilent. It uses the Xilinx Spartan 3-e chip and has a lot of nice extra features that the … Continue reading
Digital Design Implementing 8085
All op codes are not represented / implemented in this design however adding them should be very straight forward. This digital design utilizes a bus in order to achieve high efficiency and throughput. The design is scaled back a bit … Continue reading