Well, I thought I’d be extra generous since I haven’t posted in so long, and have uploaded 4 verilog examples for your viewing pleasure.
I have been a bit busy to comment them but I hope that they may be useful still as just coding examples.
Enjoy
Verilog – 14-bit BCD ( Binary Converted to Decimal)
Verilog – 4 [...]

This SLSL / ’sudo verilog’ program implements the digital design of a pipeline having multiple registers, an adder, and multiplication architecture. The program can easily be re-implemented in Verilog at your discretion. SLSL is a wonderful language that allows for rapid development of digital designs, which is why many of my programs are [...]

It took a week to get it from Washington state, but it’s finally here.  My gorgeous Nexys 2 board I ordered from Digilent.  It uses the Xilinx Spartan 3-e chip and has a lot of nice extra features that the one that Xilinx makes didn’t have.  Digilent’s website also has a ton of cool addons [...]

All op codes are not represented / implemented in this design however adding them should be very straight forward. This digital design utilizes a bus in order to achieve high efficiency and throughput.  The design is scaled back a bit and uses less registers than the actual 8085.  This can be easily modified though.  Additional [...]