Posted on March 13th, 2009 by COMP-E
This post will go to the forum eventually. I need to fight with my hosting people first and get them to bump the limit on the amount of memory PHP can use. So, for now, you can get all the good stuff here!
EDIT: I fixed the issue. You can now view this topic on the [...]
Posted on March 12th, 2009 by COMP-E
This SLSL / ’sudo verilog’ program implements the digital design of a pipeline having multiple registers, an adder, and multiplication architecture. The program can easily be re-implemented in Verilog at your discretion. SLSL is a wonderful language that allows for rapid development of digital designs, which is why many of my programs are [...]
Posted on February 16th, 2009 by COMP-E
Hey all,
The COMP-E forum is starting to grow as I add and encourage others to add usefull new content. Here is a list and quick link guide to all the current topics on the forum.
Signals & Systems
Digital Design Implementing 8085 in SLSL / Verilog
Digital Design with Pipeline 6 Bit Registers (Add & Mult)
Digital Design with [...]